pSemi Corporation is a Murata company driving semiconductor integration. pSemi builds on Peregrine Semiconductor's 30-year legacy of technology advancements and strong IP portfolio but with a new mission-to enhance Murata's world-class capabilities with high-performance semiconductors. With a strong foundation in RF integration, pSemi's product portfolio now spans power management, connected sensors, optical transceivers, antenna tuning and RF frontends. These intelligent and efficient semiconductors enable advanced modules for smartphones, base stations, personal computers, electric vehicles, data centers, IoT devices and healthcare. From headquarters in San Diego and offices around the world, pSemi's team explores new ways to make electronics for the connected world smaller, thinner, faster and better.

Job Summary

We are looking for an enthusiastic and motivated Digital Design Intern to join our team. The Digital Design Intern is a part of the Digital Engineering team within the Engineering Infrastructure Department. The ideal candidate for this position will be a high-performing BS, MS or PHD student in Electrical Engineering or Computer Science who has a passion for technology and enjoys working in a fast-paced and dynamic environment.

We are seeking a self-starter who is eager to learn and can think critically and work independently. In this role you will have the opportunity to gain valuable experience in the development of standard cell libraries and digital place for related process. To be successful in this role, you should have a strong understanding of circuit and layout design fundamentals and be comfortable with scripting languages. In addition, excellent organizational and communication skills are essential.

Roles & Responsibilities

This position has responsibility for:

• Learn the Standard cell library development including circuit and architecture optimization for power, performance, and area optimization.
• Utilize scripting languages to develop and optimize standard cell libraries. Apply digital design fundamentals to optimize standard cell libraries.
• Develop and test new design and layout techniques for standard cell libraries. Maintain and track library development progress. Research and analyze current industry trends related to standard cell libraries.
• Perform a place and route test case to ensure the routing ports are accessible.
• Collaborate with other team members to ensure library development is completed in a timely manner.
• Create and document test plans and procedures to ensure accuracy of library designs.
• Generate reports and presentations for internal and external use. Identify areas of improvement and suggest solutions.
• Supporting development and delivery for various processes and PDK (process design kits) test-chips and benchmarking standard cells content.
• Flow automation skills in standard cells, development, and integration to improve execution efficiency.

Competency Requirements

In order to perform the job successfully, an individual should demonstrate the following competencies:

• Critical Thinking: Skilled at finding logical flaws in arguments and plans; identifies problems and solutions that others might miss; provides detailed insight and constructive criticism into problems and complex situations.
• Working with Ambiguity: Achieves forward progress in the face of poorly defined situations and/or unclear goals; able to work effectively with limited or partial information.
• Displaying Technical Expertise: Keeps his/her technical skills current; effectively applies specialized knowledge and skills to perform work tasks; understands and masters the technical skills, knowledge, and tasks associated with his/her job; shares technical expertise with others.
• Driving for Results: Aggressively pursues challenging goals and objectives; put in considerable time and effort to accomplish objectives; takes a highly focused, goal driven approach toward work.
• Making Accurate Judgments and Decisions: Bases decisions on a systematic review of relevant facts and information; avoids making assumptions or rushing to judgment; provides clear rationale for decisions.

Minimum Qualifications (Experience and Skills)

• Knowledge with transistor level circuit design using Cadence Virtuoso and circuit simulator such as SPECTRE, SPICE.
• Experience using TCL/Python/Perl.
• An understanding of transistor level device physics and standard cell layout parasitic and knowledge of power, performance, and area tradeoffs.
• Demonstrated scripting and software skills to develop or enhance productivity tools.
• Familiarity with IC design techniques.

Preferred Qualifications

• Strong circuit design background and good knowledge of standard cell layout.
• Knowledge in EDA tool/flow/methodology, product, and IP developments, programming experience.
• Knowledge of logic synthesis and place and route tools.
• Excellent problem-solving skills.
• Ability to work in a fast paced, multi-tasking environment.
• Excellent verbal/written communication and presentation skills.
• Strong independence and proven ability to set and meet own goals.

Education Requirements

• Fulltime enrollment in accredited Bachelor's degree program in Electrical Engineer (must be completing 3+ year); MSEE or PHD student preferred

Work Environment

This job operates in a professional office environment. This role routinely uses standard office equipment.

Physical Demands

The physical demands described here are representative of those that must be met by an employee to successfully perform the essential functions of this job. While performing the duties of this job, the employee is regularly required to talk or hear. The employee frequently is required to stand; walk; use hands to finger, handle or feel; and reach with hands and arms. Specific vision abilities required by this job include close vision, distance vision, color vision, peripheral vision, depth perception and ability to adjust focus. This position requires the ability to occasionally lift office products and supplies, up to 20 pounds.

$30.83 - $57.20 per hour

pSemi Corporation supports a diverse workforce and is committed to a policy of equal employment opportunity for applicants and employees. pSemi does not discriminate on the basis of age, race, color, religion (including religious dress and grooming practices), sex/gender (including pregnancy, childbirth, or related medical conditions or breastfeeding), gender identity, gender expression, genetic information, national origin (including language use restrictions and possession of a driver's license issued under Vehicle Code section 12801.9), ancestry, physical or mental disability, legally-protected medical condition, military or veteran status (including "protected veterans" under applicable affirmative action laws), marital status, sexual orientation, or any other basis protected by local, state or federal laws applicable to the Company. pSemi also prohibits discrimination based on the perception that an employee or applicant has any of those characteristics, or is associated with a person who has or is perceived as having any of those characteristics.

Note: The Peregrine Semiconductor name, Peregrine Semiconductor logoand UltraCMOS are registered trademarks and the pSemi name, pSemi logo, HaRP andDuNE are trademarks of pSemi Corporation in the U.S. and other countries. All other trademarks are the property of their respective companies. pSemi products are protected under one or more of the following U.S. Patents: